setting the external clock with the PLL
    set the OSCSRC bits 5-4 of SYSCTL_RCC_R  to 0 to select external oscillator
Write to the XTAL field in the SYSCTL_RCC_R bits 10-6,
	the demo board has an external oscillator of 16Mhz so this field must be set
	to 10101

Write to the SYSDIV2 field in the SYSCTL_RCC@_R register bits 28-22

To set the PLL: use SYSCTL_RCC2_R
   set the BYPASS2 (bit 11) - at this point there is no divider
   specify the crystal frequency (see above) By doing this you are telling
			the micro controller how many clock cycles it should count from the pll 
			between oscillator cycles. It can then adjust the speed of the loop to 
			create an accurate higher frequency than the clock source
    clear the oscsrc2 bits (see above)
	clear the PWRDN2(bit 13) to actvate the pll
	configure and enable clock divider - 7 bit SYSDIV2 - the clock is divided by
			this value + 1. So if you want an 80MHZ clock from a 400Mhz PLL set the 
			value of sysdiv2 to 4 so the clock gets divided by 5
	wait for the pll to stablilize by waiting for PLLRIS (bit6 |SYSCTL_RIS_R) to become high
	connect the PLL by clearing the BYPASS2 bit.
	
	
void PLL_Init(void){
  // 0) Use RCC2
  SYSCTL_RCC2_R |=  0x80000000;  // USERCC2
  // 1) bypass PLL while initializing
  SYSCTL_RCC2_R |=  0x00000800;  // BYPASS2, PLL bypass
  // 2) select the crystal value and oscillator source
  SYSCTL_RCC_R = (SYSCTL_RCC_R &~0x000007C0)   // clear XTAL field, bits 10-6
                 + 0x00000540;   // 10101, configure for 16 MHz crystal
  SYSCTL_RCC2_R &= ~0x00000070;  // configure for main oscillator source
  // 3) activate PLL by clearing PWRDN
  SYSCTL_RCC2_R &= ~0x00002000;
  // 4) set the desired system divider
  SYSCTL_RCC2_R |= 0x40000000;   // use 400 MHz PLL
  SYSCTL_RCC2_R = (SYSCTL_RCC2_R&~ 0x1FC00000)  // clear system clock divider
                  + (4<<22);      // configure for 80 MHz clock
  // 5) wait for the PLL to lock by polling PLLLRIS
  while((SYSCTL_RIS_R&0x00000040)==0){};  // wait for PLLRIS bit
  // 6) enable use of PLL by clearing BYPASS
  SYSCTL_RCC2_R &= ~0x00000800;
}